Abstract

Digital delta-sigma modulators are used in a broad range of modern electronic sub-systems, including oversampled digital-to-analogue converters, class-D amplifiers and fractional-N frequency synthesizers.

This work addresses a well known problem of unwanted spurious tones in the modulator’s output spectrum. When a delta-sigma modulator works with a constant input, the output signal can be periodic, where short periods lead to strong deterministic tones. In this work we propose means for guaranteeing that the output period will never be shorter than a prescribed minimum value for all constant inputs. This allows a relationship to be formulated between the modulator’s bus width and the spurious-free range, thereby making it possible to trade output spectrum quality for hardware consumption.

The second problem addressed in this thesis is related to the finite accuracy of frequencies generated in delta-sigma fractional-N frequency synthesis. The synthesized frequencies are usually approximated with an accuracy that is dependent on the modulator’s bus width. We propose a solution which allows frequencies to be generated exactly and removes the problem of a constant phase drift. This solution, which is applicable to a broad range of digital delta-sigma modulator architectures, replaces the traditionally used truncation quantizer with a variable modulus quantizer. The modulus, provided by a separate input, defines the denominator of the rational output mean.

The thesis concludes with a practical example of a delta-sigma modulator used in a fractional-N frequency synthesizer designed to meet the strict accuracy requirements of a GSM base station transceiver. Here we optimize and compare a traditional modulator and a variable modulus design in order to minimize hardware consumption. The example illustrates the use made of the relationship between the spurious-free range and the modulator’s bus width, and the practical use of the variable modulus functionality.